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  ? 1 ? e03y13-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. CXG1171UR 20 pin uqfn (plastic) high power sp4t switch with logic control description this ic can be used in wireless communication systems, for example, w-cdma handsets. the ic has on-chip logic for operation with 5 cmos control inputs. the sony jphemt process is used for low insertion loss and on-chip logic circuit. features ? low insertion loss  5 cmos compatible control line  small package size: 20-pin uqfn applications antenna switch for cellular handsets w-cdma structure gaas jphemt mmic absolute maximum ratings (ta = 25c)  bias voltage v dd 7v  control voltage vctl 5 v  operation temperature topr ?35 to +85 c  storage temperature tstg ?65 to +150 c gaas mmic's are esd sensitive devices. special handling precautions are required.
? 2 ? CXG1171UR block diagram and recommended circuit f4 f8 rf5 rf1 gnd5 f3 f7 rf4 gnd4 f2 f6 rf3 gnd3 f1 f5 rf2 gnd2 uqfn-20p pkg 2.7mm 2.7mm h = 0.55mm 1 16 17 18 19 20 10 9 8 7 6 2 3 4 5 15 14 13 12 11 gnd4 rf4 gnd gnd3 rf3 ctle ctld ctlc ctlb ctla v dd gnd rf2 gnd2 gnd gnd rf1 gnd rf5 gnd5
? 3 ? CXG1171UR truth table state 1 2 3 4 ctla h h h h h h h h l ctlb h/l h l h l h/l l l h/l ctlc h h l l l h h l h/l ctld l l h h/l h/l h l l h/l ctle l h l h/l h h/l h l h/l on pass rf1 ? rf2 rf1 ? rf3 rf1 ? rf4 rf1 ? rf5 f1 on off off off f2 off on off off f3 off off on off f4 off off off on f5 off on on on f6 on off on on f7 on on off on f8 on on on off dc bias condition (ta = 25c) item vctl (h) vctl (l) v dd unit v v v min. 2.0 0 2.5 ty p. 2.85 ? 2.85 max. 3.6 0.4 3.6
? 4 ? CXG1171UR electrical characteristics (ta = 25c) item insertion loss isolation vswr switching speed aclr harmonics bias current control current unit db db db db db db db db db db db db db ? s dbc dbc dbc dbc ma a ty p. 0.35 0.40 0.35 0.40 0.35 0.40 0.80 0.85 35 35 35 25 30 1.2 4 ?60 ?62 ?75 ?75 0.20 15 max. 0.60 0.65 0.60 0.65 0.60 0.65 1.10 1.15 10 ?50 ?55 ?60 ?60 0.35 25 min. 30 30 30 20 25 condition rf1 ? rf2, 1920 to 1980mhz 2110 to 2170mhz rf1 ? rf3, 1920 to 1980mhz 2110 to 2170mhz rf1 ? rf4, 1920 to 1980mhz 2110 to 2170mhz rf1 ? rf5, 1920 to 1980mhz 2110 to 2170mhz rf1 ? rf2, 1920 to 2170mhz rf1 ? rf3, 1920 to 2170mhz rf1 ? rf4, 1920 to 2170mhz rf1 ? rf5, 1920 to 2170mhz rf1 ? rf2, 3, 4, 1920 to 2170mhz 50 ? 5mhz, 3.84mhz bw, ? 1 10mhz, 3.84mhz bw, ? 1 ? 1 ? 1 v dd = 2.85v vctl (h) = 2.85v symbol il iso. vswr tsw aclr1 aclr2 2fo 3fo i dd ictl state 1 2 3 4 2, 3 1, 3 1, 2 1, 2, 3 4 ? 1 pin = 25dbm, 0/2.85v control, v dd = 2.85v, 1920 to 1980mhz
? 5 ? CXG1171UR sony corporation package outline unit: mm pin 1 index c 0.1 s a-b 0.4 0.05 m s c c a-b s 0.05 s max0.02 + 0.09 20pin uqfn 9? plastic 9? 0.25 ? 0.03 + 0.09 0.14 ? 0.03 x 4 2.7 1 5 11 15 16 20 6 10 2.7 s 0.4 0.1 : 1.3 0.55 0.05 4-r0.3  a b 0.25 0.14 0.07 0.18 sony code eiaj code jedec code package material lead treatment lead material epoxy resin solder plating copper alloy 0.02g package structure uqfn-20p-01 package mass terminal section note:cutting burr of lead are 0.05mm max. solder plating lead plating specifications item lead material copper alloy solder composition sn-bi bi:1-4wt% plating thickness 5-18 m spec.


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